1. Technical Field
The present disclosure relates to a phase-change random access memory and, more particularly, to a phase-change random access memory with improved repair efficiency and reliability.
2. Discussion of the Related Art
Phase-change random access memories (PRAMs) store data using a phase-change material, for example, a chalcogenide alloy, that goes into a crystalline state or an amorphous state due to a change in temperature such as cooling followed by heating. Since the resistance of a crystalline phase-change material is low, whereas the resistance of an amorphous phase-change material is high, the crystalline state is referred to as a set or “0” state and the amorphous state is referred to as a reset or “1” state.
In an input/output (I/O) repair scheme of a PRAM, failed memory columns of a memory block are replaced with redundancy memory columns. In the PRAM, at least one or more failed memory columns can be simultaneously repaired by at least one or more redundancy memory columns. For example, when the I/O repair mode is set to a ×1 mode, failed memory columns are repaired one by one. When the I/O repair mode is set to a ×2 mode, failed memory columns are repaired two by two.
A memory block typically includes a plurality of memory columns corresponding to the same column address and uses different input/output paths, such that a plurality of bits are simultaneously input and output.
In such a memory block, the repair efficiency and reliability of the I/O repair mode may vary according to the location of a failed memory column. Specifically, in the ×1 mode, failed memory columns are repaired one by one, thus exhibiting high repair efficiency. However, in a case where failures occur to two memory columns corresponding to the same column address and using different I/O paths, the failed two memory columns cannot be repaired in the ×1 mode, resulting in a deterioration in reliability. Furthermore, since failed memory columns are repaired two by two in the ×2 mode, even when failures occur to two memory columns corresponding to the same column address and using different I/O paths, the failed two memory columns can still be repaired. Thus, the ×2 mode exhibits better reliability than the ×1 mode.